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Single-chip 16-bit/32-bit microcontrollers; 8 kB/16 kB/32 kB flash with ISP/IAP, fast ports and 10-bit ADC


16-bit/32-bit ARM7TDMI-S CPU with real-time emulation that combines the microcontroller with 8 kB, 16 kB or 32 kB of embedded high-speed flash memory.

Microcontroller with 8KB flash, Fast IO
Microcontroller with 16KB flash, Fast IO
Microcontroller with 32KB flash, Fast IO

< Key Features >

  • 16-bit/32-bit ARM7TDMI-S microcontroller in a tiny LQFP48 package.
  • 2 kB/4 kB/8 kB of on-chip static RAM and 8 kB/16 kB/32 kB of on-chip flash program memory. 128-bit wide interface/accelerator enables high-speed 70 MHz operation.
  • ISP/IAP via on-chip bootloader software. Single flash sector or full chip erase in 100 ms and programming of 256 bytes in 1 ms.
  • EmbeddedICE-RT offers real-time debugging with the on-chip RealMonitor software.
  • The 10-bit ADC provides eight analog inputs, with conversion times as low as 2.44 us per channel and dedicated result registers to minimize interrupt overhead.
  • Two 32-bit timers/external event counters with combined seven capture and seven compare channels.
  • Two 16-bit timers/external event counters with combined three capture and seven compare channels.
  • Low power Real-Time Clock (RTC) with independent power and dedicated 32 kHz clock input.
  • Multiple serial interfaces including two UARTs (16C550), two Fast I 2 C-buses (400 kbit/s), SPI and SSP with buffering and variable data length capabilities.
  • Vectored interrupt controller with configurable priorities and vector addresses.
  • Up to thirty-two 5 V tolerant fast general purpose I/O pins.
  • Up to 13 edge or level sensitive external interrupt pins available.
  • 70 MHz maximum CPU clock available from programmable on-chip PLL with a possible input frequency of 10 MHz to 25 MHz and a settling time of 100 us.
  • On-chip integrated oscillator operates with an external crystal in the range from 1 MHz to 25 MHz.
  • Power saving modes include Idle mode, Power-down mode with RTC active, and Power-down mode.
  • Individual enable/disable of peripheral functions as well as peripheral clock scaling for additional power optimization.
  • Processor wake-up from Power-down mode via external interrupt or RTC.

< Block Diagrams >

< Pinning >

< Comparison Table >

Ordering Code
LPC2101FBD48 9352 809 63151
LPC2102FBD48 9352 809 65151
LPC2103FA44 9352 813 98512
LPC2103FBD48 9352 809 66151
LPC2103FBD48 9352 809 66118
- Application Notes -  
- AN10254_2; NXP ARM LPC microcontroller family
- AN10255_2; Philips LPC210x microcontroller family
- AN10256-2 Using IAP for LPC2000 ARM devices
- AN10302_4; Using the Philips LPC2000 Flash utility with the Keil MCB2100 and IAR LPC210x Kickstart evaluation boards
- AN10331_1; Philips LPC2xxx family phase lock loop
- AN10369_1; UART/SPI/I2C code examples
- AN10381_1; Nesting of interrupts in the LPC2000
- AN10403_1; Connecting ethernet interface with LPC2000
- AN10404_1; Initialization code/hints for the LPC2000 family
- AN10413_2; uC/OS-II Time Management in LPC2000
- AN10513_1; Brushed DC motor control using the LPC2101
- AN10576_1; Migrating to the LPC2300/2400 family
- Support Documents-  
- 75015814; 70-MHz, 32-bit microcontroller with ARM7 core LPC210x
- 75016051: The choice for embedded Technologies
- ES_LPC2101_1; Errata sheet LPC2101
- ES_LPC2102_1; Errata sheet LPC2102
- ES_LPC2103_1; Errata sheet LPC2103
- LPC2101_02_03 User Manual
- Technical Notes -  
- TN06004_LPC2000 ADC Code Example
- TN06005_LPC2000_I2C; LPC2000 I2C slave code example
- LPC2000 USB Design Guide Line
- UUencode

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