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208-MHz, 32-bit microcontroller with ARM9EJ-S™ core


16/32-bit ARM microcontroller; hardware floating-point coprocessor, USB On-The-Go, and SDRAM

LPC3180 ROMless ARM9 microcontroller with SDRAM interface, USB On-The-Go

< Key Features >

  • ARM926EJ-S processor with 32 kB instruction cache and 32 kB data cache, running at up to 208 MHz.
  • 64 kB of SRAM.
  • High-performance multi-layer AHB bus system provides a separate bus for CPU data and instruction fetch, two data buses for the DMA controller, and another for the USB controller.
  • External memory interfaces: one supports DDR and SDR SDRAM, another supports single-level and multi-level NAND flash devices and can serve as an 8-bit parallel interface.
  • General purpose DMA controller that can be used with the SD card and SPI interfaces, as well as for memory-to-memory transfers.
  • USB 2.0 full-speed device, host (OHCI compliant), and OTG block. A dedicated PLL provides the 48 MHz USB clock.
  • Multiple serial interfaces, including seven UARTs, two SPI controllers, and two single master I2C-bus interfaces.
  • SD memory card interface.
  • Up to 55 GPI, GPO, and GPIO pins. Includes 12 GPI pins, 24 GPO pins, and six GPIO pins.
  • 10-bit ADC with input multiplexing from three pins.
  • Real-Time Clock (RTC) with separate power supply and power domain, clocked by a dedicated 32 kHz oscillator. Includes a 128 byte scratch pad memory. The RTC may remain active when the rest of the chip is not powered.
  • 32-bit general purpose high-speed timer with 16-bit pre-scaler with capture and compare capability.
  • 32-bit millisecond timer driven from the RTC clock. Interrupts may be generated using two match registers.
  • Watchdog timer.
  • Two PWM blocks with an output rate up to 50 kHz.
  • Keyboard scanner function provides automatic scanning of up to an 8 x 8 key matrix.
  • Standard ARM test/debug interface for compatibility with existing tools.
  • Emulation trace buffer with 2 k x 24-bit RAM allows trace via JTAG.
  • On-chip crystal oscillator.
  • Stop mode saves power, while allowing many peripheral functions to restart CPU activity.
  • On-chip PLL allows CPU operation up to the maximum CPU rate without the need for a high frequency crystal.
  • Boundary scan for simplified board testing.

< Block Diagram >


< Pinning >

< LPC3180 Selection Guide >


Package Name
LPC3180FEL320 9352 818 74551
- Support Documents-  
- 75015463; Low-power ARM9 microcontroller
- 75015694; 208-MHz, 32-bit microcontroller with ARM9EJ-S(tm) LPC3180
- 75016051: The choice for embedded Technologies
- LPC3180 User Manual

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