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ARM968E-S processor in little-endian byte order.


NXP LPC29xx microcontrollers are based on 80-MHz ARM968E-S MCUs with two CAN controllers and up to two LIN controllers

LPC2917 ARM9 microcontroller with 512KB flash, 48KB SRAM, 2 CAN channels, 2 LIN masters
LPC2919 ARM9 microcontroller with 768KB flash, 48KB SRAM, 2 CAN channels, 2 LIN masters

< Key Features >

  • ARM968E-S processor at 80 MHz maximum
  • Multi-layer AHB system bus at 80 MHz with three separate layers
  • On-chip memory:
  • Two Tightly Coupled Memories (TCM), 16 kB Instruction (ITCM), 16 kB Data TCM
  • Two separate internal Static RAM (SRAM) instances; 32 kB SRAM and 16 kB
  • Up to 768 kB flash-program memory
  • Two-channel CAN controller supporting Full-CAN and extensive message filtering
  • Two LIN master controllers with full hardware support for LIN communication
  • Two 550 UARTs with 16-byte Tx and Rx FIFO depths
  • Three full-duplex Q-SPIs with four slave-select lines; 16 bits wide; 8 locations deep; Tx
    FIFO and Rx FIFO
  • Four 32-bit timers each containing four capture-and-compare registers linked to I/Os
  • 32-bit watchdog with timer change protection, running on safe clock.
  • Up to 108 general-purpose I/O pins with programmable pull-up, pull-down or bus
  • Vectored Interrupt Controller (VIC) with 16 priority levels
  • Two 8-channel 10-bit ADCs provide a total of up to 16 analog inputs, with conversion
    times as low as 2.44 μs per channel. Each channel provides a compare function to
    minimize interrupts
  • Up to 24 level-sensitive external interrupt pins, including CAN and LIN wake- up
  • External Static Memory Controller (SMC) with eight memory banks; up to 32-bit data
    bus; up to 24-bit address bus
  • Processor wake-up from power-down via external interrupt pins; CAN or LIN activity
  • Flexible Reset Generator Unit (RGU) able to control resets of individual modules
  • Flexible Clock-Generation Unit (CGU) able to control clock frequency of individual
  • On-chip very low-power ring oscillator; fixed frequency of 0.4 MHz; always on to
    provide a Safe_Clock source for system monitoring
  • On-chip crystal oscillator with operating range from 10 MHz to 50 MHz - max. PLL
    input 15 MHz
  • On-chip PLL allows CPU operation up to a maximum CPU rate of 80 MHz
  • Generation of up to 10 base clocks
  • Seven fractional dividers

<Block Diagram >

< Pinning>

Package Name
LPC2917FBD144 LQFP144
LPC2919FBD144 LQFP144
- Application Notes -  
- AN10254-2 NXP ARM LPC microcontroller family
- AN10256-2 Using IAP for LPC2000 ARM devices
- AN10403_1; Connecting ethernet interface with LPC2000
- AN10413_2; uC/OS-II Time Management in LPC2000
- AN10414-1; Handling of spurious interrupts in the LPC2000
- AN10421_1; Power management for LPC2138
- AN10513_1; Brushed DC motor control using the LPC2101
- AN10548_1; Getting started with LPC288x
- AN10549_2; Design rules and schematics for LPC288x
- AN10576_1; Migrating to the LPC2300/2400 family
- AN10583_1; Realizing an MP3 player with the LPC2148, using libmad & EFSL
- AN10661_1; Brushless DC motor control using the LPC2141
- Support Documents-  
- NXP_flash_utility : ARM flash utility
- 75015574; 60-MMHz, 32-bit microcontrollers with ARM7TDMI-S(tm) cores LPC288x 4 High-e 8- memory.
- 75015572; The innovation leader in microcontrollers (2006-09-01) if (DPIMENU) DPIMENU.setCategoryLink
- 75016051: The choice for embedded Technologies
- LPC2917/2919 User Manual
- Technical Notes -  
- TN05007 LPC2xxx UART Transmitter Code Example
- TN06001 LPC2xxx SPI Master Code Example
- TN06002 LPC2000 EINT Code Example
- TN06004 LPC2000 ADC Code Example
- LPC2000 I2C Slave Code Example
- LPC2000 USB Design Guide Line
- UUencode

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